"Strategy of integrated classical-quantum chips development in Poland" (Warsaw Quantum Computing Group meetup, Episode LXII)

Acronym: 

WQCG Episode LXII

Dates: 

Thursday, November 28, 2024

Organising group(s): 

Quantum AI Foundation

Registration deadline: 

Wednesday, November 27, 2024

Submission deadline: 

Wednesday, November 27, 2024

Tags: 

Location: 

Online event

Currently there is a worldwide race to obtain functional quantum computers [1-2] and various forms of quantum technologies such as quantum metrology or quantum communications. Those technologies will enhance our lifestyle and boost civilization development. Despite various forms of theoretical achievements in mathematics and in physics Poland is quite behind the race in Q-Tech development especially in hardware perspective. Therefore, it is necessary to boost the effort in development of integrated Josephson junctions [3-4] in Rapid Single Quantum Flux scheme, development of transmon superconducting qubits and development of semiconductor single-electron devices [5]. The preplanned scheme of actions is given and relies on the usage of interface between transmon qubit and parametron Josephson junction [4] as the way to obtain hybrid classical-quantum computers. Such hybrid computers where a small quantum chip is surrounded by a massive classical but still cryogenic chip is of more commercial value simply than basing only on the quantum paradigm alone. In this context there is a big opportunity of usage of recently available cryogenic CMOS semiconductor based technology[ 6]. The perspective of implementation of interface between semiconductor quantum computer and Josephson junction quantum computer is also given as by [7-8].

Literature

[1]. IBM Quantum Experience ( https://quantum.ibm.com/ ),

[2]. F.Arute, K.Arya, R.Babbush, et al. Quantum supremacy using a programmable superconducting processor. Nature 574, 2019 (https://doi.org/10.1038/s41586-019-1666-5),

[3]. H.C.Jay, C. LeFebvre, Hao Li, Ethan Y. Cho, Nobuyuki Yoshikawa, Shane A. Cybart; High-temperature superconductor quantum flux parametron for energy efficient logic. Appl. Phys. Lett. 20, 2024; 124 ( https://doi.org/10.1063/5.0206445 ).

[4]. F. China, T. Narama, N. Takeuchi, T. Ortlepp, Y. Yamanashi and N. Yoshikawa, "Study of Signal Interface between Single Flux Quantum Circuit and Adiabatic Quantum Flux Parametron," 2015 , ( 10.1109/ISEC.2015.7383483 ) .

[5]. K.Pomorski, Electrostatically Interacting Wannier Qubits in Curved Space. Materials 2024, 17, 4846, ( https://doi.org/10.3390/ma17194846 ) .

[6]. E. Charbon et al., "Cryo-CMOS for quantum computing," 2016 IEEE International Electron Devices Meeting (IEDM), 2016 ( doi: 10.1109/IEDM.2016.7838410).

[7]. K.Pomorski, P.Peczkowski,R.Staszewski, Analytical solutions for N interacting electron system confined in graph of coupled electrostatic semiconductor and superconducting quantum dots in tight-binding model, Cryogenics, Vol.109,2020 (https://doi.org/10.1016/j.cryogenics.2020.103117),

[8]. H.H.Kang, I.T.Rosen, M.Hays, et al. , Remote Entangling Gates for Spin Qubits in Quantum Dots using an Offset-Charge-Sensitive Transmon Coupler, arXiv:2409.08915, 2024.